1. Field of the Invention
The present invention relates to a method for driving a plasma display panel.
2. Description of the Related Background Art
Plasma display panels of AC type (alternating-current discharge type) have recently been put into production as thin-model displays. A plasma display panel contains two substrates, i.e., a front glass substrate and a rear glass substrate which are opposed to each other with a predetermined gap therebetween. A plurality of pairs of row electrodes which are paired with each other and extended in parallel are formed on the inner surface (the side opposed to the rear glass substrate) of the foregoing front glass substrate, or a display surface, as pairs of sustain electrodes. A plurality of column electrodes are formed on the rear glass substrate as address electrodes so as to extend orthogonal to the pairs of row electrodes, and phosphors are further applied thereto. When viewed from the foregoing display-surface side, display cells corresponding to pixels are formed at intersections of the pairs of row electrodes and the column electrodes.
The plasma display panel is subjected to gradation driving based on a sub-field method for the sake of achieving halftone display luminance corresponding to an input video signal.
In the gradation driving based on the sub-field method, a display drive for a single field of a video signal is performed in a plurality of individual sub-fields to which respective intended numbers of times (or periods) of light emission are assigned. In each sub-field, an address stage and a sustain stage are performed in succession. At the address stage, selective discharge is generated between the row electrodes and the column electrodes of respective display cells selectively in accordance with the input video signal, thereby forming (or erasing) a predetermined amount of wall charge. At the sustain stage, sustain pulses are applied to each row electrode so that display cells having the predetermined amount of wall charge formed therein alone generate discharge repeatedly to sustain the light-emitting state resulting from the discharge. An initialization stage is also performed at least in the first sub-field, prior to the address stage. In the initialization stage, reset discharge is generated between the paired row electrodes in all the display cells, thereby initializing the amount of wall charge remaining in each display cell.
The reset discharge is comparatively strong and not involved in the content of an image to be displayed, so that light emission caused by the reset discharge lowers the image contrast.
In such a situation, a proposal has been made on a PDP and driving method for same that discharge delay is reduced by putting a magnesium oxide crystallization, that emits light of cathode-luminescence with a peak at a wavelength of 200-300 nm under the excitation of electron beam irradiation, over the surface of a dielectric layer covering the row electrode pairs (see Japanese Patent Laid-Open No. 2006-54160). According to the PDP, weak discharge can be caused stably because the post-discharge priming effect continues for a comparatively long time. Consequently, by applying to the PDP row electrodes a reset pulse having a pulse waveform whose voltage gradually reaches a peak value with the passage of time, weak reset discharge is caused between adjacent ones of the row electrodes. In this case, the image contrast can be improved because the luminance level of light emission given by the discharge is lowered by the weakening of reset discharge.
However, with such a driving scheme, there is a difficulty in fully enhancing so-called dark contrast in displaying a dark image, thus problematically making it impossible to provide a dark image in a quality state.